Inferact and AMD separate shipped vLLM support from the Instinct roadmap

Inferact and AMD have announced a joint engineering program to improve vLLM on AMD Instinct GPUs, but the useful distinction for operators is between one demonstrated serving path and the broader roadmap the companies have promised.

What has shipped

The concrete implementation available now is Meta’s Muse Spark Open on AMD Instinct MI350X and MI355X accelerators. AMD’s October 15 technical article documents the model on a single eight-GPU node with ROCm 7.2, vLLM and the AITER kernel library. It lists BF16, AMD-quantized MXFP4 and FP8 checkpoints, publishes an image tag — vllm/vllm-openai-rocm:muse-spark-open — and links a public vLLM recipe.

That is more than a compatibility claim. AMD provides commands for tensor parallelism, expert parallelism and DSpark speculative decoding, including vLLM’s OpenAI-compatible API, reasoning controls and tool-call parser. The article reports configuration-specific throughput and accuracy figures, and says the tuned AITER table and short-query attention schedule ship in the image.

For operators, this is the usable path today: an eight-MI350X or eight-MI355X node, the named ROCm container, the published checkpoint choices and the recipe’s tested flags. It is not evidence that every vLLM model or every Instinct generation has equivalent support.

What the collaboration promises

Inferact’s announcement describes a wider program. AMD is contributing accelerator access, ROCm engineering, hardware expertise and AITER kernels. Inferact and the vLLM community are contributing model integration, serving features and day-zero enablement. The companies say they will work from shared, model-by-model roadmaps spanning kernels, serving features and model coverage, with the resulting work landing in open source.

The current target is agentic inference: long-running sessions, long prefixes and validated tool calling. Inferact says future configurations will be published as per-model serving recipes, while the partners intend to extend day-zero model coverage, deepen kernel co-development and release performance data as it becomes available.

Those are commitments, not yet a general support matrix. The announcement does not name a vLLM release that completes the program, enumerate every supported Instinct accelerator, or publish a schedule for the promised recipes and benchmarks.

What operators should do

Teams evaluating AMD for vLLM should treat the Muse Spark Open implementation as the first reproducible proof point. Validate that exact container, checkpoint and topology against local latency, throughput and accuracy requirements before generalizing the results.

For other models, wait for the promised per-model artifacts: a public recipe, an identified image or release, tested hardware topology and performance data. The partnership matters because it creates a shared upstream route for those artifacts; the operational evidence still arrives one model at a time.